Browsing by Subject "Microprocessor chips"

Now showing items 1-20 of 28

    • Conference Object  

      Adaptive high-end microprocessor for power-performance efficiency 

      Trancoso, Pedro (2006)
      Microprocessor development costs are considerably high. To minimize these costs, manufacturers produce a single design that better satisfies, in average, a wide range of applications. Nevertheless, as applications have ...
    • Article  

      CacheFlow: A short-term optimal cache management policy for data driven multithreading 

      Kyriacou, Costas; Evripidou, Paraskevas; Trancoso, Pedro (2004)
      With Data Driven Multithreading a thread is scheduled for execution only if all of its inputs have been produced and placed in the processor's local memory. Scheduling based on data availability may be used to exploit ...
    • Article  

      A case for chip multiprocessors based on the data-driven multithreading model 

      Trancoso, Pedro; Evripidou, Paraskevas; Stavrou, Kyriakos; Kyriacou, Costas (2006)
      Current high-end microprocessors achieve high performance as a result of adding more features and therefore increasing complexity. This paper makes the case for a Chip-Multiprocessor based on the Data-Driven Multithreading ...
    • Article  

      CATCH: A mechanism for dynamically detecting cache-content-duplication in instruction caches 

      Kleanthous, Marios M.; Sazeides, Yiannakis (2011)
      Cache-content-duplication (CCD) occurs when there is a miss for a block in a cache and the entire content of the missed block is already in the cache in a block with a different tag. Caches aware of content-duplication can ...
    • Conference Object  

      Combining compile and run-time dependency resolution in Data-Driven Multithreading 

      Arandi, Samer; Michael, G.; Evripidou, Paraskevas; Kyriacou, Costas (2012)
      Threaded Data-Flow systems schedule threads based on data-availability i.e. a thread can be scheduled for execution only after all its inputs have been generated by its producer threads. This requires that all data ...
    • Article  

      Data-driven multithreading using conventional microprocessors 

      Kyriacou, Costas; Evripidou, Paraskevas; Trancoso, Pedro (2006)
      This paper describes the Data-Driven Multithreading (DDM) model and how it may be implemented using off-the-shelf microprocessors. Data-Driven Multithreading is a nonblocking multithreading execution model that tolerates ...
    • Conference Object  

      Data-flow vs control-flow for extreme level computing 

      Evripidou, Paraskevas; Kyriacou, Costas (Institute of Electrical and Electronics Engineers Inc., 2014)
      This paper challenges the current thinking for building High Performance Computing (HPC) Systems, which is currently based on the sequential computing also known as the von Neumann model, by proposing the use of Novel ...
    • Conference Object  

      DDM-CMP: Data-driven multithreading on a chip multiprocessor 

      Stavrou, Kyriakos; Evripidou, Paraskevas; Trancoso, Pedro (2005)
      High-end microprocessors achieve their performance as a result of adding more features and therefore increasing their complexity. In this paper we present DDM-CMP, a Chip-Multiprocessor using the Data-Driven Multithreading ...
    • Conference Object  

      DDM-VMc :The data-driven multithreading virtual machine for the cell processor 

      Arandi, Samer; Evripidou, Paraskevas (2011)
      In this paper we present the Data-Driven Multithreading Virtual Machine for the Cell Processor (DDM-VMc). Data-Driven Multithreading is a non-blocking multithreading model that decouples the synchronization from the ...
    • Conference Object  

      Design space navigation for neighboring power-performance efficient microprocessor configurations 

      Trancoso, Pedro (2005)
      Microprocessor design is a considerably complex task. First, microprocessors include many resources that may be configured in different ways. This leads to a time consuming multi-objective optimization problem. Second, ...
    • Article  

      Design tradeoffs for the Alpha EV8 conditional branch predictor 

      Seznec, A.; Felix, S.; Krishnan, V.; Sazeides, Yiannakis (2002)
      This paper presents the Alpha EV8 conditional branch predictor. The Alpha EV8 microprocessor project, canceled in June 2001 in a late phase of development, envisioned an aggressive 8-wide issue out-of-order superscalar ...
    • Conference Object  

      Dynamic split: Flexible border between instruction and data cache 

      Trancoso, Pedro (2005)
      Current microprocessors are optimized for the average use. Nevertheless, it is known that different applications impose different demands on the system. This work focuses on the reconfiguration of the first-level caches. ...
    • Conference Object  

      Exploring database workloads on future clustered many-core architectures 

      Petrides, P.; Diavastos, Andreas; Trancoso, Pedro (2011)
      Decision Support System (DSS) workloads are known to be one of the most time-consuming database workloads that process large data sets. Traditionally, DSS queries have been accelerated using large-scale multiprocessor. In ...
    • Conference Object  

      Exploring HPC parallelism with data-driven multithreating 

      Christofides, Constantinos; Michael, G.; Trancoso, Pedro; Evripidou, Paraskevas (IEEE Computer Society, 2013)
      The switch to Multi-core systems has ended the reliance on the single processor for increase in performance and moved into Parallelism. However, the exponential growth in performance of the single processor in the 80's and ...
    • Article  

      Fine-grain parallelism using multi-core, Cell/BE, and GPU systems 

      Pratas, F.; Trancoso, Pedro; Sousa, L.; Stamatakis, A.; Shi, G.; Kindratenko, V. (2012)
      Currently, we are facing a situation where applications exhibit increasing computational demands and where a large variety of parallel processor systems are available. In this paper we focus on exploiting fine-grain ...
    • Article  

      Hardware budget and runtime system for data-driven multithreaded chip multiprocessor 

      Stavrou, Kyriakos; Trancoso, Pedro; Evripidou, Paraskevas (2006)
      The Data-Driven Multithreading Chip Multiprocessor (DDM-CMP) architecture has been shown to overcome the power and memory wall limitations by combining two key technologies: the use of the Data-Driven Multithreading (DDM) ...
    • Conference Object  

      Implementation of IEEE single precision floating point addition and multiplication on FPGAs 

      Louca, Loucas S.; Cook, Todd A.; Johnson, William H. (Affiliation: Rutgers Univ, Piscataway, United StatesCorrespondence Address: Louca, LoucasRutgers Univ, Piscataway, United States, 1996)
      Floating point operations are hard to implement on FPGAs because of the complexity of their algorithms. On the other hand, many scientific problems require floating point arithmetic with high levels of accuracy in their ...
    • Article  

      Integrating Transactions into the Data-Driven Multi-threading Model Using the TFlux Platform 

      Diavastos, Andreas; Trancoso, Pedro; Luján, M.; Watson, I. (2016)
      The introduction of multi-core processors has renewed the interest in programming models which can efficiently exploit general purpose parallelism. Data-Flow is one such model which has demonstrated significant potential ...
    • Conference Object  

      Integrating transactions into the data-driven multi-threading model using the tflux platform 

      Diavastos, Andreas; Trancoso, Pedro; Luján, M.; Watson, I. (2012)
      Multi-core processors have renewed interest in programming models which can efficiently exploit general purpose parallelism. Data-Flow is one such model which has demonstrated significant potential in the past. However, ...
    • Conference Object  

      LDPC decoding on the Intel SCC 

      Diavastos, Andreas; Petrides, P.; Falcão, G.; Trancoso, Pedro (2012)
      Low-Density Parity-Check (LDPC) codes are powerful error correcting codes used today in communication standards such as DVB-S2 and WiMAX to transmit data inside noisy channels with high error probability. LDPC decoding is ...